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Showing results for "High Level Synthesis"

High ― Level Synthesis: Introduction to Chip and System Design

High ― Level Synthesis: Introduction to Chip and System Design

Daniel D. Gajski
High-Level Synthesis Blue Book (Japanese Edition)

High-Level Synthesis Blue Book (Japanese Edition)

Michael Fingeroff
Guide to Computer Processor Architecture: A RISC-V Approach, with High-Level Synthesis (Undergraduate Topics in Computer Science)

Guide to Computer Processor Architecture: A RISC-V Approach, with High-Level Synthesis (Undergraduate Topics in Computer Science)

Bernard Goossens
High-Level Synthesis: from Algorithm to Digital Circuit

High-Level Synthesis: from Algorithm to Digital Circuit

Philippe Coussy
High-Level Synthesis for Real-Time Digital Signal Processing (The Springer International Series in Engineering and Computer Science)

High-Level Synthesis for Real-Time Digital Signal Processing (The Springer International Series in Engineering and Computer Science)

Jan Vanhoof
High-Level Synthesis: from Algorithm to Digital Circuit

High-Level Synthesis: from Algorithm to Digital Circuit

Philippe Coussy
High Level Synthesis of Digital Systems: For Data Path and Control dominated systems

High Level Synthesis of Digital Systems: For Data Path and Control dominated systems

Samary Baranov
[High Level Synthesis of Pipelined Datapaths (Electrical and Electronics Engr)] [Author: Arató, Péter] [January, 2001]

[High Level Synthesis of Pipelined Datapaths (Electrical and Electronics Engr)] [Author: Arató, Péter] [January, 2001]

Péter Arató
Separation Logic for High-level Synthesis (Springer Theses)

Separation Logic for High-level Synthesis (Springer Theses)

Felix Winterstein
High-Level Modeling and Synthesis of Analog Integrated Systems (Analog Circuits and Signal Processing)

High-Level Modeling and Synthesis of Analog Integrated Systems (Analog Circuits and Signal Processing)

Georges Gielen
High Level Synthesis of ASICs under Timing and Synchronization Constraints (The Springer International Series in Engineering and Computer Science)

High Level Synthesis of ASICs under Timing and Synchronization Constraints (The Springer International Series in Engineering and Computer Science)

David C. Ku
Automatic Custom Instruction Identification For High-level Synthesis

Automatic Custom Instruction Identification For High-level Synthesis

Xiao Chenglong
By Mohanty, Saraju P. Low-Power High-Level Synthesis for Nanoscale CMOS Circuits Paperback - November 2010

By Mohanty, Saraju P. Low-Power High-Level Synthesis for Nanoscale CMOS Circuits Paperback - November 2010

Unknown Author
Instruction set mapping for high-level synthesis of datapath- intensive architectures: Research project

Instruction set mapping for high-level synthesis of datapath- intensive architectures: Research project

Miguel R Corazao
Domain Specific High-Level Synthesis for Cryptographic Workloads

Domain Specific High-Level Synthesis for Cryptographic Workloads

Ayesha Khalid
Verification and Synthesis of Digital Circuits: High-level Synthesis and Equivalence Checking

Verification and Synthesis of Digital Circuits: High-level Synthesis and Equivalence Checking

Chandan Karfa
Proceedings of the Seventh International Symposium on High-Level Synthesis: May 18-20, 1994, Niagara-On-The-Lake, Ontario, Canada

Proceedings of the Seventh International Symposium on High-Level Synthesis: May 18-20, 1994, Niagara-On-The-Lake, Ontario, Canada

Acm Special Interest Group On Design Automation
[(High Level Synthesis of ASICs Under Timing and Synchronization Constraints )] [Author: David C. Ku] [Jun-1992]

[(High Level Synthesis of ASICs Under Timing and Synchronization Constraints )] [Author: David C. Ku] [Jun-1992]

David C. Ku
High-Level Synthesis Made Easy: Synthesizing Behavioral Descriptions directly into Hardware Circuits

High-Level Synthesis Made Easy: Synthesizing Behavioral Descriptions directly into Hardware Circuits

Benjamin Carrion Schaefer